Silicon Power next gen DDR5 UDIMM
Credit: Silicon Power

Næste generation af DDR5 UDIMM afsløret

Næste generation af DDR5 UDIMM tilbyder hastigheder på op til 4800 MHz og er målrettet mod multi-core CPU’er.

“Even with all of its extra power, this DDR5 module improves upon its predecessor with on-module voltage regulation. A power management integrated circuit (PMIC) reduces the burden on the motherboard control and results in a lower voltage of 1.1V versus 1.2V for DDR4 for even less power consumption. Taking speed, capacity, and reliability even further, the cutting-edge technology of this DDR5 module gives that next-level edge for your system’s performance. With aggressive speeds of 4800MHz, it’s 1.5x faster than standard 3200MHz DDR4 to provide multi-core CPUs with extreme responsiveness and the power to multi-task seamlessly.”

Silicon Power DDR5 UDIMM resulterer i:

  • Fordoblet kapacitet sammenlignet med DDR4 (fra 16 GB til 32 GB) for lack-less multi-tasking
  • Forbedret stabilitet i forhold til DDR4 med On-Die Error Correction Code (ECC)
  • Optimeret effektivitet med to uafhængige 32-bit kanaler pr. modul
  • Bedre performance via dobbelt burst-længde sammenlignet med DDR4
  • 4800MHz giver hurtigere transmissionshastigheder og højere båndbredde end DDR4
  • Tilgængelig i 8GB, 16GB og 32GB moduler
  • Mere end 2 gange hastighed sammenlignet med DDR4 på multi-core CPU systemer
  • Lav spænding på 1,1V for mindre strømforbrug
  • Kompatibel med 12. generations Intel Core-processorer, der understøtter DDR5- og DDR5-kompatible bundkort

“Compared to DDR4’s 16GB chip unit capacity, this DDR5 module doubles that number to 32GB by packing in more banks and bank groups. This allows for more pages to be open at a time so you can increase your productivity without worrying about your system slowing down from having too many tabs open at once. That’s not all that’s doubled – the minimum burst length on this DDR5 module is up to 16, up from 8 for DDR4. This improves data bus efficiency, providing twice the data on the bus, and consequently reduces the number of reads/writes to access the same cache data line.”

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“This DDR5 module introduces On-Die ECC (Error Correction Code), a new feature that was designed to correct bit errors in real-time within the DRAM chip. By doing so, this advanced technology keeps your system reliably stable while automatically correcting data errors. For even greater performance, this DDR5 module features two independent 32-bit channels per module. Compared to DDR4’s single channel, splitting it into two increases efficiency and lowers the latencies of data accesses for the memory controller to promote optimized efficiency.”

Credit & Billedrettigheder: TPU: SP

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